FIG. 1 shows example 1 of the prior art which is a debugging system that is generally called a ROM monitor. A serial interface 80 for connecting with a host computer 90 is provided on a user target system 70, and a monitor program 41 is stored in memory 40. Microprocessor 10 accesses I/O 50, memory 40, and register 11 by running monitor program 41. Furthermore, execution control of user programs is performed by using software break instructions.
FIG. 2 shows example 2 of the prior art. A serial interface 12, needed for communication with debugging tool 100, and a sequencer 13 for interpreting and executing the electrical signals sent from the debugging tool 100, are contained in microprocessor 10 on user target system 70. According to received signals, sequencer 13 temporarily halts the execution of the user program's accessing of register 11, or accessing of memory 40 or I/O 50 by using bus controller 14. Furthermore, execution control of user programs is performed by using hardware break points or software break instructions.
Since signals from serial interface 12 often cannot be connected directly to host computer 90, debugging tool 100 converts the commands from host computer 90 to electrical signals that can be connected directly to microprocessor 10, and converts signals from microprocessor 10 to a data format host computer 90 understands.
FIG. 3 shows example 3 of the prior art which is a debugging system that is generally called an in-circuit emulator. During debugging, microprocessor 10 on user target board system 70 is removed or made inactive, and the probe of debugging tool 110 is connected thereto for running debugging microprocessor 120 instead. Debugging microprocessor 120 controls the execution of the user programs, accesses data in memory 40, and accesses I/O 50 by executing the monitor program stored in monitor program memory 130 on the debugging tool. Moreover, debugging microprocessor 120 executes programs stored in memory 40 on the user target system just as though the microprocessor 10 were executing them. Moreover, debugging tool 110 has a trace memory 140, and can trace the state of the processor bus of debugging microprocessor 120. Debugging microprocessor 110 outputs the trace information that is not available from microprocessor 10. By doing so, some of the internal state of the processor that cannot be traced from the processor bus alone can be traced.
FIG. 4 shows example 4 of the prior art which is a debugging system that is generally called a preprocessor. By connecting the probe of a logic analyzer 150 to processor bus 90 of microprocessor 10 on user target system 70, accesses to memory 40 and I/O 50 of microprocessor 10 can be traced.
Since the operations and circuit structures of the examples of the prior art explained in FIGS. 1 through 4 are well known to those skilled in the art, no further explanation will be provided here.
Problems the Present Invention Seeks to Solve
In example 1 of the prior art, since the monitor program runs on the user memory, if an operation of the memory system of the user's target system is not complete, there are cases in which the monitor itself does not operate in a stable manner. Moreover, if there is no room left in the memory of the target system, the address space to be occupied by the monitor may not be available. Furthermore, since some of the user interrupt must be used for the entry into the monitor mode, debugging is sometimes impossible, depending on the kind of program. Moreover, it is necessary to provide circuits such as a serial interface circuit in the target system that may not be used after the debugging. Also, since no resources for debugging, such as hardware break points are provided, the debugging functions are poor, and traces cannot be obtained.
In example 2 of the prior art, since a sequencer is incorporated in the microprocessor, and the sequencer accesses the registers, the logic circuits for connection with the debugging tool become complex, and the surface area they require on the chip becomes large. Moreover, when additional registers or the like are provided, the sequencer must be updated. Furthermore, traces cannot be obtained in this prior art example.
In example 3 of the prior art, since the debugging tool is connected to all of the pins of the microprocessor on the user target, the probe becomes expensive, and the contact of the probe is often unstable. Moreover, when switching accesses between the memory on the target and the monitor memory in the debugging tool, the buses must be switched rapidly; therefore, it is difficult to implement with processors running at a high operating frequency. If there are derivative microprocessors, because their packages, pin counts and pin assignment are different, though essentially the same debugging tool can be used, different debugging tools must be prepared with probes for the respective derivative microprocessors. Moreover, connecting the probe has an influence on the signals used in the user target, which may sometimes make the operation of the user target itself unstable.
Though example 4 of the prior art is effective with respect to tracing, even with high-frequency processors, it cannot perform tracing with respect to processors with internal cache memories while the cache is being hit. Moreover, with respect to the processors with internal queues, it is not possible to determine whether fetched instructions are executed or not. Furthermore, there is no function for controlling the execution of the user program, and it is not possible to read the contents of the user memory or the I/O.